204 lines
8.5 KiB
C
204 lines
8.5 KiB
C
/*
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Copyright (c) 2005-2017 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#if !defined(__TBB_machine_H) || defined(__TBB_machine_sunos_sparc_H)
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#error Do not #include this internal file directly; use public TBB headers instead.
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#endif
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#define __TBB_machine_sunos_sparc_H
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#include <stdint.h>
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#include <unistd.h>
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#define __TBB_WORDSIZE 8
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// Big endian is assumed for SPARC.
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// While hardware may support page-specific bi-endianness, only big endian pages may be exposed to TBB
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#define __TBB_ENDIANNESS __TBB_ENDIAN_BIG
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/** To those working on SPARC hardware. Consider relaxing acquire and release
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consistency helpers to no-op (as this port covers TSO mode only). **/
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#define __TBB_compiler_fence() __asm__ __volatile__ ("": : :"memory")
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#define __TBB_control_consistency_helper() __TBB_compiler_fence()
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#define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
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#define __TBB_release_consistency_helper() __TBB_compiler_fence()
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#define __TBB_full_memory_fence() __asm__ __volatile__("membar #LoadLoad|#LoadStore|#StoreStore|#StoreLoad": : : "memory")
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//--------------------------------------------------
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// Compare and swap
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//--------------------------------------------------
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/**
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* Atomic CAS for 32 bit values, if *ptr==comparand, then *ptr=value, returns *ptr
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* @param ptr pointer to value in memory to be swapped with value if *ptr==comparand
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* @param value value to assign *ptr to if *ptr==comparand
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* @param comparand value to compare with *ptr
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( @return value originally in memory at ptr, regardless of success
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*/
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static inline int32_t __TBB_machine_cmpswp4(volatile void *ptr, int32_t value, int32_t comparand ){
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int32_t result;
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__asm__ __volatile__(
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"cas\t[%5],%4,%1"
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: "=m"(*(int32_t *)ptr), "=r"(result)
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: "m"(*(int32_t *)ptr), "1"(value), "r"(comparand), "r"(ptr)
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: "memory");
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return result;
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}
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/**
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* Atomic CAS for 64 bit values, if *ptr==comparand, then *ptr=value, returns *ptr
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* @param ptr pointer to value in memory to be swapped with value if *ptr==comparand
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* @param value value to assign *ptr to if *ptr==comparand
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* @param comparand value to compare with *ptr
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( @return value originally in memory at ptr, regardless of success
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*/
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static inline int64_t __TBB_machine_cmpswp8(volatile void *ptr, int64_t value, int64_t comparand ){
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int64_t result;
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__asm__ __volatile__(
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"casx\t[%5],%4,%1"
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: "=m"(*(int64_t *)ptr), "=r"(result)
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: "m"(*(int64_t *)ptr), "1"(value), "r"(comparand), "r"(ptr)
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: "memory");
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return result;
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}
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//---------------------------------------------------
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// Fetch and add
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//---------------------------------------------------
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/**
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* Atomic fetch and add for 32 bit values, in this case implemented by continuously checking success of atomicity
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* @param ptr pointer to value to add addend to
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* @param addened value to add to *ptr
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* @return value at ptr before addened was added
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*/
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static inline int32_t __TBB_machine_fetchadd4(volatile void *ptr, int32_t addend){
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int32_t result;
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__asm__ __volatile__ (
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"0:\t add\t %3, %4, %0\n" // do addition
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"\t cas\t [%2], %3, %0\n" // cas to store result in memory
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"\t cmp\t %3, %0\n" // check if value from memory is original
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"\t bne,a,pn\t %%icc, 0b\n" // if not try again
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"\t mov %0, %3\n" // use branch delay slot to move new value in memory to be added
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: "=&r"(result), "=m"(*(int32_t *)ptr)
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: "r"(ptr), "r"(*(int32_t *)ptr), "r"(addend), "m"(*(int32_t *)ptr)
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: "ccr", "memory");
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return result;
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}
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/**
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* Atomic fetch and add for 64 bit values, in this case implemented by continuously checking success of atomicity
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* @param ptr pointer to value to add addend to
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* @param addened value to add to *ptr
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* @return value at ptr before addened was added
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*/
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static inline int64_t __TBB_machine_fetchadd8(volatile void *ptr, int64_t addend){
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int64_t result;
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__asm__ __volatile__ (
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"0:\t add\t %3, %4, %0\n" // do addition
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"\t casx\t [%2], %3, %0\n" // cas to store result in memory
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"\t cmp\t %3, %0\n" // check if value from memory is original
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"\t bne,a,pn\t %%xcc, 0b\n" // if not try again
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"\t mov %0, %3\n" // use branch delay slot to move new value in memory to be added
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: "=&r"(result), "=m"(*(int64_t *)ptr)
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: "r"(ptr), "r"(*(int64_t *)ptr), "r"(addend), "m"(*(int64_t *)ptr)
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: "ccr", "memory");
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return result;
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}
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//--------------------------------------------------------
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// Logarithm (base two, integer)
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//--------------------------------------------------------
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static inline int64_t __TBB_machine_lg( uint64_t x ) {
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__TBB_ASSERT(x, "__TBB_Log2(0) undefined");
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uint64_t count;
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// one hot encode
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x |= (x >> 1);
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x |= (x >> 2);
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x |= (x >> 4);
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x |= (x >> 8);
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x |= (x >> 16);
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x |= (x >> 32);
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// count 1's
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__asm__ ("popc %1, %0" : "=r"(count) : "r"(x) );
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return count-1;
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}
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//--------------------------------------------------------
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static inline void __TBB_machine_or( volatile void *ptr, uint64_t value ) {
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__asm__ __volatile__ (
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"0:\t or\t %2, %3, %%g1\n" // do operation
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"\t casx\t [%1], %2, %%g1\n" // cas to store result in memory
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"\t cmp\t %2, %%g1\n" // check if value from memory is original
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"\t bne,a,pn\t %%xcc, 0b\n" // if not try again
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"\t mov %%g1, %2\n" // use branch delay slot to move new value in memory to be added
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: "=m"(*(int64_t *)ptr)
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: "r"(ptr), "r"(*(int64_t *)ptr), "r"(value), "m"(*(int64_t *)ptr)
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: "ccr", "g1", "memory");
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}
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static inline void __TBB_machine_and( volatile void *ptr, uint64_t value ) {
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__asm__ __volatile__ (
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"0:\t and\t %2, %3, %%g1\n" // do operation
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"\t casx\t [%1], %2, %%g1\n" // cas to store result in memory
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"\t cmp\t %2, %%g1\n" // check if value from memory is original
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"\t bne,a,pn\t %%xcc, 0b\n" // if not try again
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"\t mov %%g1, %2\n" // use branch delay slot to move new value in memory to be added
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: "=m"(*(int64_t *)ptr)
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: "r"(ptr), "r"(*(int64_t *)ptr), "r"(value), "m"(*(int64_t *)ptr)
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: "ccr", "g1", "memory");
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}
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static inline void __TBB_machine_pause( int32_t delay ) {
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// do nothing, inlined, doesn't matter
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}
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// put 0xff in memory location, return memory value,
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// generic trylockbyte puts 0x01, however this is fine
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// because all that matters is that 0 is unlocked
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static inline bool __TBB_machine_trylockbyte(unsigned char &flag){
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unsigned char result;
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__asm__ __volatile__ (
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"ldstub\t [%2], %0\n"
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: "=r"(result), "=m"(flag)
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: "r"(&flag), "m"(flag)
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: "memory");
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return result == 0;
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}
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#define __TBB_USE_GENERIC_PART_WORD_CAS 1
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#define __TBB_USE_GENERIC_PART_WORD_FETCH_ADD 1
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#define __TBB_USE_GENERIC_FETCH_STORE 1
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#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
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#define __TBB_USE_GENERIC_RELAXED_LOAD_STORE 1
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#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
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#define __TBB_AtomicOR(P,V) __TBB_machine_or(P,V)
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#define __TBB_AtomicAND(P,V) __TBB_machine_and(P,V)
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// Definition of other functions
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#define __TBB_Pause(V) __TBB_machine_pause(V)
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#define __TBB_Log2(V) __TBB_machine_lg(V)
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#define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P)
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