182 lines
9.4 KiB
C++
182 lines
9.4 KiB
C++
/*
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Copyright (c) 2005-2017 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#if !defined(__TBB_machine_H) || defined(__TBB_machine_linux_ia64_H)
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#error Do not #include this internal file directly; use public TBB headers instead.
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#endif
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#define __TBB_machine_linux_ia64_H
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#include <stdint.h>
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#include <ia64intrin.h>
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#define __TBB_WORDSIZE 8
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#define __TBB_ENDIANNESS __TBB_ENDIAN_LITTLE
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#if __INTEL_COMPILER
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#define __TBB_compiler_fence()
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#define __TBB_control_consistency_helper() __TBB_compiler_fence()
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#define __TBB_acquire_consistency_helper()
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#define __TBB_release_consistency_helper()
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#define __TBB_full_memory_fence() __mf()
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#else
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#define __TBB_compiler_fence() __asm__ __volatile__("": : :"memory")
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#define __TBB_control_consistency_helper() __TBB_compiler_fence()
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// Even though GCC imbues volatile loads with acquire semantics, it sometimes moves
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// loads over the acquire fence. The following helpers stop such incorrect code motion.
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#define __TBB_acquire_consistency_helper() __TBB_compiler_fence()
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#define __TBB_release_consistency_helper() __TBB_compiler_fence()
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#define __TBB_full_memory_fence() __asm__ __volatile__("mf": : :"memory")
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#endif /* !__INTEL_COMPILER */
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// Most of the functions will be in a .s file
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// TODO: revise dynamic_link, memory pools and etc. if the library dependency is removed.
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extern "C" {
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int8_t __TBB_machine_fetchadd1__TBB_full_fence (volatile void *ptr, int8_t addend);
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int8_t __TBB_machine_fetchadd1acquire(volatile void *ptr, int8_t addend);
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int8_t __TBB_machine_fetchadd1release(volatile void *ptr, int8_t addend);
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int16_t __TBB_machine_fetchadd2__TBB_full_fence (volatile void *ptr, int16_t addend);
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int16_t __TBB_machine_fetchadd2acquire(volatile void *ptr, int16_t addend);
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int16_t __TBB_machine_fetchadd2release(volatile void *ptr, int16_t addend);
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int32_t __TBB_machine_fetchadd4__TBB_full_fence (volatile void *ptr, int32_t value);
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int32_t __TBB_machine_fetchadd4acquire(volatile void *ptr, int32_t addend);
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int32_t __TBB_machine_fetchadd4release(volatile void *ptr, int32_t addend);
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int64_t __TBB_machine_fetchadd8__TBB_full_fence (volatile void *ptr, int64_t value);
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int64_t __TBB_machine_fetchadd8acquire(volatile void *ptr, int64_t addend);
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int64_t __TBB_machine_fetchadd8release(volatile void *ptr, int64_t addend);
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int8_t __TBB_machine_fetchstore1__TBB_full_fence (volatile void *ptr, int8_t value);
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int8_t __TBB_machine_fetchstore1acquire(volatile void *ptr, int8_t value);
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int8_t __TBB_machine_fetchstore1release(volatile void *ptr, int8_t value);
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int16_t __TBB_machine_fetchstore2__TBB_full_fence (volatile void *ptr, int16_t value);
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int16_t __TBB_machine_fetchstore2acquire(volatile void *ptr, int16_t value);
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int16_t __TBB_machine_fetchstore2release(volatile void *ptr, int16_t value);
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int32_t __TBB_machine_fetchstore4__TBB_full_fence (volatile void *ptr, int32_t value);
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int32_t __TBB_machine_fetchstore4acquire(volatile void *ptr, int32_t value);
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int32_t __TBB_machine_fetchstore4release(volatile void *ptr, int32_t value);
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int64_t __TBB_machine_fetchstore8__TBB_full_fence (volatile void *ptr, int64_t value);
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int64_t __TBB_machine_fetchstore8acquire(volatile void *ptr, int64_t value);
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int64_t __TBB_machine_fetchstore8release(volatile void *ptr, int64_t value);
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int8_t __TBB_machine_cmpswp1__TBB_full_fence (volatile void *ptr, int8_t value, int8_t comparand);
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int8_t __TBB_machine_cmpswp1acquire(volatile void *ptr, int8_t value, int8_t comparand);
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int8_t __TBB_machine_cmpswp1release(volatile void *ptr, int8_t value, int8_t comparand);
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int16_t __TBB_machine_cmpswp2__TBB_full_fence (volatile void *ptr, int16_t value, int16_t comparand);
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int16_t __TBB_machine_cmpswp2acquire(volatile void *ptr, int16_t value, int16_t comparand);
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int16_t __TBB_machine_cmpswp2release(volatile void *ptr, int16_t value, int16_t comparand);
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int32_t __TBB_machine_cmpswp4__TBB_full_fence (volatile void *ptr, int32_t value, int32_t comparand);
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int32_t __TBB_machine_cmpswp4acquire(volatile void *ptr, int32_t value, int32_t comparand);
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int32_t __TBB_machine_cmpswp4release(volatile void *ptr, int32_t value, int32_t comparand);
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int64_t __TBB_machine_cmpswp8__TBB_full_fence (volatile void *ptr, int64_t value, int64_t comparand);
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int64_t __TBB_machine_cmpswp8acquire(volatile void *ptr, int64_t value, int64_t comparand);
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int64_t __TBB_machine_cmpswp8release(volatile void *ptr, int64_t value, int64_t comparand);
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int64_t __TBB_machine_lg(uint64_t value);
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void __TBB_machine_pause(int32_t delay);
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bool __TBB_machine_trylockbyte( volatile unsigned char &ptr );
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int64_t __TBB_machine_lockbyte( volatile unsigned char &ptr );
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//! Retrieves the current RSE backing store pointer. IA64 specific.
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void* __TBB_get_bsp();
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int32_t __TBB_machine_load1_relaxed(const void *ptr);
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int32_t __TBB_machine_load2_relaxed(const void *ptr);
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int32_t __TBB_machine_load4_relaxed(const void *ptr);
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int64_t __TBB_machine_load8_relaxed(const void *ptr);
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void __TBB_machine_store1_relaxed(void *ptr, int32_t value);
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void __TBB_machine_store2_relaxed(void *ptr, int32_t value);
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void __TBB_machine_store4_relaxed(void *ptr, int32_t value);
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void __TBB_machine_store8_relaxed(void *ptr, int64_t value);
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} // extern "C"
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// Mapping old entry points to the names corresponding to the new full_fence identifier.
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#define __TBB_machine_fetchadd1full_fence __TBB_machine_fetchadd1__TBB_full_fence
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#define __TBB_machine_fetchadd2full_fence __TBB_machine_fetchadd2__TBB_full_fence
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#define __TBB_machine_fetchadd4full_fence __TBB_machine_fetchadd4__TBB_full_fence
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#define __TBB_machine_fetchadd8full_fence __TBB_machine_fetchadd8__TBB_full_fence
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#define __TBB_machine_fetchstore1full_fence __TBB_machine_fetchstore1__TBB_full_fence
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#define __TBB_machine_fetchstore2full_fence __TBB_machine_fetchstore2__TBB_full_fence
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#define __TBB_machine_fetchstore4full_fence __TBB_machine_fetchstore4__TBB_full_fence
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#define __TBB_machine_fetchstore8full_fence __TBB_machine_fetchstore8__TBB_full_fence
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#define __TBB_machine_cmpswp1full_fence __TBB_machine_cmpswp1__TBB_full_fence
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#define __TBB_machine_cmpswp2full_fence __TBB_machine_cmpswp2__TBB_full_fence
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#define __TBB_machine_cmpswp4full_fence __TBB_machine_cmpswp4__TBB_full_fence
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#define __TBB_machine_cmpswp8full_fence __TBB_machine_cmpswp8__TBB_full_fence
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// Mapping relaxed operations to the entry points implementing them.
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/** On IA64 RMW operations implicitly have acquire semantics. Thus one cannot
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actually have completely relaxed RMW operation here. **/
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#define __TBB_machine_fetchadd1relaxed __TBB_machine_fetchadd1acquire
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#define __TBB_machine_fetchadd2relaxed __TBB_machine_fetchadd2acquire
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#define __TBB_machine_fetchadd4relaxed __TBB_machine_fetchadd4acquire
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#define __TBB_machine_fetchadd8relaxed __TBB_machine_fetchadd8acquire
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#define __TBB_machine_fetchstore1relaxed __TBB_machine_fetchstore1acquire
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#define __TBB_machine_fetchstore2relaxed __TBB_machine_fetchstore2acquire
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#define __TBB_machine_fetchstore4relaxed __TBB_machine_fetchstore4acquire
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#define __TBB_machine_fetchstore8relaxed __TBB_machine_fetchstore8acquire
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#define __TBB_machine_cmpswp1relaxed __TBB_machine_cmpswp1acquire
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#define __TBB_machine_cmpswp2relaxed __TBB_machine_cmpswp2acquire
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#define __TBB_machine_cmpswp4relaxed __TBB_machine_cmpswp4acquire
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#define __TBB_machine_cmpswp8relaxed __TBB_machine_cmpswp8acquire
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#define __TBB_MACHINE_DEFINE_ATOMICS(S,V) \
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template <typename T> \
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struct machine_load_store_relaxed<T,S> { \
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static inline T load ( const T& location ) { \
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return (T)__TBB_machine_load##S##_relaxed(&location); \
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} \
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static inline void store ( T& location, T value ) { \
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__TBB_machine_store##S##_relaxed(&location, (V)value); \
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} \
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}
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namespace tbb {
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namespace internal {
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__TBB_MACHINE_DEFINE_ATOMICS(1,int8_t);
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__TBB_MACHINE_DEFINE_ATOMICS(2,int16_t);
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__TBB_MACHINE_DEFINE_ATOMICS(4,int32_t);
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__TBB_MACHINE_DEFINE_ATOMICS(8,int64_t);
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}} // namespaces internal, tbb
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#undef __TBB_MACHINE_DEFINE_ATOMICS
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#define __TBB_USE_FENCED_ATOMICS 1
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#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
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#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
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// Definition of Lock functions
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#define __TBB_TryLockByte(P) __TBB_machine_trylockbyte(P)
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#define __TBB_LockByte(P) __TBB_machine_lockbyte(P)
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// Definition of other utility functions
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#define __TBB_Pause(V) __TBB_machine_pause(V)
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#define __TBB_Log2(V) __TBB_machine_lg(V)
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