71 lines
2.7 KiB
C
71 lines
2.7 KiB
C
/*
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Copyright (c) 2005-2017 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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// TODO: revise by comparing with mac_ppc.h
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#if !defined(__TBB_machine_H) || defined(__TBB_machine_ibm_aix51_H)
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#error Do not #include this internal file directly; use public TBB headers instead.
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#endif
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#define __TBB_machine_ibm_aix51_H
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#define __TBB_WORDSIZE 8
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#define __TBB_ENDIANNESS __TBB_ENDIAN_BIG // assumption based on operating system
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#include <stdint.h>
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#include <unistd.h>
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#include <sched.h>
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extern "C" {
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int32_t __TBB_machine_cas_32 (volatile void* ptr, int32_t value, int32_t comparand);
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int64_t __TBB_machine_cas_64 (volatile void* ptr, int64_t value, int64_t comparand);
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void __TBB_machine_flush ();
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void __TBB_machine_lwsync ();
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void __TBB_machine_isync ();
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}
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// Mapping of old entry point names retained for the sake of backward binary compatibility
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#define __TBB_machine_cmpswp4 __TBB_machine_cas_32
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#define __TBB_machine_cmpswp8 __TBB_machine_cas_64
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#define __TBB_Yield() sched_yield()
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#define __TBB_USE_GENERIC_PART_WORD_CAS 1
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#define __TBB_USE_GENERIC_FETCH_ADD 1
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#define __TBB_USE_GENERIC_FETCH_STORE 1
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#define __TBB_USE_GENERIC_HALF_FENCED_LOAD_STORE 1
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#define __TBB_USE_GENERIC_RELAXED_LOAD_STORE 1
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#define __TBB_USE_GENERIC_SEQUENTIAL_CONSISTENCY_LOAD_STORE 1
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#if __GNUC__
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#define __TBB_control_consistency_helper() __asm__ __volatile__( "isync": : :"memory")
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#define __TBB_acquire_consistency_helper() __asm__ __volatile__("lwsync": : :"memory")
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#define __TBB_release_consistency_helper() __asm__ __volatile__("lwsync": : :"memory")
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#define __TBB_full_memory_fence() __asm__ __volatile__( "sync": : :"memory")
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#else
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// IBM C++ Compiler does not support inline assembly
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// TODO: Since XL 9.0 or earlier GCC syntax is supported. Replace with more
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// lightweight implementation (like in mac_ppc.h)
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#define __TBB_control_consistency_helper() __TBB_machine_isync ()
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#define __TBB_acquire_consistency_helper() __TBB_machine_lwsync ()
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#define __TBB_release_consistency_helper() __TBB_machine_lwsync ()
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#define __TBB_full_memory_fence() __TBB_machine_flush ()
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#endif
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